The wafer-level architecture promises up to 5x higher power density and shorter development cycles.
On 16 September 2026, onsemi introduced the Embedded Power Platform (EPP), an architecture that uses the silicon wafer itself as the package. The design integrates silicon, silicon carbide, and gallium nitride technologies into a single device, enabling between 3x and 5x higher power density than current solutions.
EPP combines multiple components, such as FETs, drivers, and controllers, using onsemi's standard 12-inch silicon wafer manufacturing lines. The company stated the platform can compress development cycles to as little as four months while lowering parasitic inductance and cutting heat.
For artificial intelligence infrastructure, an early solid-state circuit breaker using EPP measured roughly 50% smaller and ran 20% cooler than legacy units. In electric vehicle traction inverters, onsemi indicated the platform delivers up to 4x higher power density and reduces power losses by 15%.
Subaru Corporation has joined as an early engagement partner to assess how EPP can support its upcoming electrified vehicle architectures. onsemi plans to start sampling EPP in 2026 with automotive and AI customers.
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